Title:
プラズマアドレス表示装置
Document Type and Number:
Japanese Patent JP3600495
Kind Code:
B2
Abstract:
A plasma addressing display device comprising a flat panel including a display cell having columns of signal electrodes and also including a plasma cell having rows of discharge channels, with pixels formed at intersections of the signal electrodes and the discharge channels; a scanning circuit for sequentially discharging the columns of the signal electrodes at a pre-set period to select pixels from row to row; and a signal circuit for supplying picture signals to the column of the signal electrodes to write the picture signals in the pixels of the selected row, the scanning circuit discharging each discharge channel with time shift as the discharging period allocated to the discharge channel of a previous row is partially overlapped at least with the discharging period allocated to the discharge channel of the next row to allocate a discharging period longer than the pre-set period to each discharge channel.
Inventors:
Yoshihiro Sugano
Yoichi Morita
Takehiro Togawa
Hirohito Komatsu
Masatake Hayashi
Kiyoshi Okano
Yoichi Morita
Takehiro Togawa
Hirohito Komatsu
Masatake Hayashi
Kiyoshi Okano
Application Number:
JP2000021599A
Publication Date:
December 15, 2004
Filing Date:
January 31, 2000
Export Citation:
Assignee:
ソニー株式会社
シャープ株式会社
シャープ株式会社
International Classes:
G02F1/133; G02F1/1333; G09G3/20; G09G3/36; (IPC1-7): G09G3/36; G02F1/133; G02F1/1333
Domestic Patent References:
| JP4265931A | ||||
| JP2123326A |
Attorney, Agent or Firm:
Harutoshi Suzuki