Title:
半導体装置
Document Type and Number:
Japanese Patent JP3611561
Kind Code:
B2
Abstract:
A semiconductor device includes a semiconductor substrate formed with a plurality of electrode pads, and wiring electrically connecting the electrode pads to external electrodes to be connected to conductive patterns formed on an external circuit board, the wiring formed into a plurality of layers. The semiconductor device also includes insulating layers interposed between the layers of the wiring, and between the lowermost layer of the wiring and the semiconductor substrate, thereby to ensure insulation therebetween; the layers of the wiring each having depressed portions located at via holes formed in the insulating layers, the depressed portions connected to the lower layer of the wiring or the electrode pads; bump electrodes formed on the depressed portions of the uppermost layer of the wiring; external electrodes formed on the top surfaces of the bump electrodes; and a sealing layer formed over the uppermost layer of the wiring so as to expose the top surface of each of the bump electrodes.
Inventors:
Takushi Ohsumi
Application Number:
JP2002333404A
Publication Date:
January 19, 2005
Filing Date:
November 18, 2002
Export Citation:
Assignee:
Oki Electric Industry Co., Ltd.
International Classes:
H01L23/12; H01L21/60; H01L23/31; H01L23/485; (IPC1-7): H01L23/12
Domestic Patent References:
JP2001185444A | ||||
JP2001521288A |
Attorney, Agent or Firm:
Minoru Maeda
Youichi Yamagata
Youichi Yamagata