Title:
同期信号にロックされた発振信号を発生する装置
Document Type and Number:
Japanese Patent JP3670005
Kind Code:
B2
Abstract:
In a phase-lock-loop circuit a frequency detector measures a frequency error between an oscillatory signal and a synchronizing signal in alternate horizontal line periods for generating a frequency error indicative signal. The frequency error indicative signal is applied to an oscillator for correcting the frequency error in other alternate horizontal line periods in a manner to prevent frequency error measurement and correction from occurring in the same horizontal line period.
Inventors:
Thor, Donald Jiyoung
Rotuda, william
Kyanbel The Third, Edward Litchiard
De Louba, Francis
Rotuda, william
Kyanbel The Third, Edward Litchiard
De Louba, Francis
Application Number:
JP52354294A
Publication Date:
July 13, 2005
Filing Date:
April 19, 1994
Export Citation:
Assignee:
RCA THOMSON LICENSING CORPORATION
International Classes:
H03L7/08; H03B5/20; H03B5/24; H03K3/354; H03L7/093; H03L7/099; H03L7/10; H03L7/113; H03L7/14; H04N5/12; H04N5/445; H04N5/45; H04N7/12; H03B1/00; (IPC1-7): H03L7/093; H03L7/10; H03L7/14
Domestic Patent References:
| JP5022132A |
Foreign References:
| US5159292 |
Attorney, Agent or Firm:
Katsunori Watanabe