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Title:
不揮発性メモリシステムおよび不揮発性半導体メモリ
Document Type and Number:
Japanese Patent JP3976839
Kind Code:
B2
Abstract:
A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.

Inventors:
Tatsuya Ishii
Hitoshi Miwa
Osamu Tsuchiya
Kubo Nozomi
Application Number:
JP12679397A
Publication Date:
September 19, 2007
Filing Date:
May 16, 1997
Export Citation:
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Assignee:
Renesas Technology Corp.
International Classes:
G11C16/02; G11C7/00; G11C11/34; G11C16/04; G11C16/10
Domestic Patent References:
JP7169288A
JP6111589A
Attorney, Agent or Firm:
Shizuyo Tamamura



 
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