Title:
貼り合わせ半導体ウェーハの製造方法
Document Type and Number:
Japanese Patent JP3986581
Kind Code:
B2
Inventors:
Hiroaki Yamamoto
Hirotaka Kato
Hiroshi Furukawa
Kazuaki Fujimoto
Hirotaka Kato
Hiroshi Furukawa
Kazuaki Fujimoto
Application Number:
JP8598296A
Publication Date:
October 03, 2007
Filing Date:
March 15, 1996
Export Citation:
Assignee:
sumco tech xiv Co., Ltd.
International Classes:
H01L21/02
Domestic Patent References:
| JP8055768A | ||||
| JP62264651A | ||||
| JP3097215A | ||||
| JP4162630A | ||||
| JP7029782A |
Attorney, Agent or Firm:
Hideharu Tanaka