Title:
ダイナミック係数スケーリングを利用するCDMA電力制御チャネル推定
Document Type and Number:
Japanese Patent JP3989600
Kind Code:
B2
Abstract:
By time-sharing demodulator hardware between a primary data path (165), a power control data path (161), and a received signal strength indicator (RSSI) path (163), an entire power control data path (161) can be implemented in a demodulator (140) of a spread spectrum subscriber unit receiver with a low increase in gate count. The primary data path (165) and the power control data path (161) time-share a complex conjugate generator (270), a complex multiplier (280), and a real component extractor (290). Due to timing requirements, though, the channel estimation filter (240) of the primary data path cannot be time-shared with the power control data path. Instead, dynamic coefficient scaling is added to an infinite-duration impulse response (IIR) filter in the RSSI path (163) so that the IIR filter (250) with dynamic coefficient scaling can be time-shared between the RSSI path (163) and the power control data path (161).
More Like This:
Inventors:
Christopher Peter LaRosa
Michael John Kearney
Christopher John Becker
Fuyun Lin
Michael John Kearney
Christopher John Becker
Fuyun Lin
Application Number:
JP27819397A
Publication Date:
October 10, 2007
Filing Date:
September 25, 1997
Export Citation:
Assignee:
Freescale Semiconductor, Inc.
International Classes:
H04B7/26; H04B1/707; H04B7/005; H04J13/00; H04L25/02; H04J11/00
Domestic Patent References:
| JP9008770A |
Foreign References:
| WO1995008224A1 |
Attorney, Agent or Firm:
Mamoru Kuwagaki