Title:
半導体装置及びその製造方法
Document Type and Number:
Japanese Patent JP3998678
Kind Code:
B2
Abstract:
There is disclosed a semiconductor storage device comprising a trench capacitor wherein a high dielectric-constant insulator is used and formation of a depletion layer in a capacitor electrode is suppressed. The semiconductor storage device comprises a trench formed in a semiconductor substrate, a high dielectric-constant insulator formed on an inner wall of the trench, a first electrode formed in the semiconductor substrate contacting with the high dielectric-constant insulator and containing dopants to provide conductivity, a second electrode formed to fill the trench and containing the same dopants at least at the same concentration as in the first electrode, and a trench capacitor which includes the first electrode, the high dielectric-constant insulator and the second electrode and in which a depletion layer capacitance ratio (C/C0) is 0.9 or more during an operation.
Inventors:
Ryuta Katsumata
Application Number:
JP2004318231A
Publication Date:
October 31, 2007
Filing Date:
November 01, 2004
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L21/8242; H01L27/108
Domestic Patent References:
| JP2004071733A | ||||
| JP7240390A | ||||
| JP2001024165A | ||||
| JP2001200363A |
Attorney, Agent or Firm:
Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Takashi Mine
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Takashi Mine
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto