Title:
半導体装置
Document Type and Number:
Japanese Patent JP4004500
Kind Code:
B2
Abstract:
The present invention relates to a semiconductor device and, more particularly, has for its object to provide a technique for improving the performance of a semiconductor device having a ground terminal and a plurality of signal terminals arranged around the ground terminal. To attain the object, the present invention features isolation between a ground terminal (5, 35) connected to a functional block (11) and a ground terminal (6, 36) connected to a functional block (12). Thus, a ground potential applied to one of the functional blocks through the corresponding ground terminal is prevented from varying depending on the magnitude of a current flowing through the other functional block. This improves the performance of each functional block to improve the performance of the semiconductor device.
More Like This:
Inventors:
Keiji Ninomiya
Kenji Ito
Hirotaka Kamima
Kenji Ito
Hirotaka Kamima
Application Number:
JP2004522709A
Publication Date:
November 07, 2007
Filing Date:
July 24, 2002
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H01L23/12; H01L23/31; H01L23/495; H01L23/50
Domestic Patent References:
| JP9223705A | ||||
| JP11233683A | ||||
| JP7312404A | ||||
| JP2002313980A |
Attorney, Agent or Firm:
Yoshitake Hidetoshi
Takahiro Arita
Takahiro Arita