Title:
半導体集積回路
Document Type and Number:
Japanese Patent JP4057756
Kind Code:
B2
Abstract:
In a flash memory, a level shifter and a driver of a wordline driver are formed by MOS transistors having a low sustaining voltage, and a voltage control circuit for controlling a driver power supply voltage VPP is provided. The voltage control circuit holds VPP at a voltage LV which is below the sustaining voltage, when the logical state of the MOS transistors is changed. In addition, the voltage control circuit ramps up VPP from the low-level voltage LV to a voltage HV which is above the sustaining voltage, after the logical state of the MOS transistors has been changed. Further, the voltage control circuit ramps down VPP from the high-level voltage HV to the low-level voltage LV, before the logical state of the MOS transistors is changed next. Such arrangement enables even a wordline driver of the low-level voltage specification to handle not only low-level voltage but also high-level voltage without introducing any problems.
Inventors:
Makoto Kojima
Application Number:
JP2000055106A
Publication Date:
March 05, 2008
Filing Date:
March 01, 2000
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
G11C16/06; G11C8/08; G11C16/08; G11C16/12; H01L21/822; H01L27/04
Domestic Patent References:
| JP6203556A | ||||
| JP5128878A | ||||
| JP10149683A | ||||
| JP5109273A | ||||
| JP10011989A | ||||
| JP9306183A | ||||
| JP4192622A | ||||
| JP11297091A |
Other References:
Mitsuru Hiraki et al.,A 3.3V 90MHz Flash Memory Module Embedded in a 32b RISC Microcontroller,1999 ISSCC Digest of Technical Papers,米国,IEEE,1999年 2月,P.116,117,453
Attorney, Agent or Firm:
Hiroshi Maeda
Hiroshi Koyama
Hiroshi Koyama