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Title:
半導体装置
Document Type and Number:
Japanese Patent JP4086068
Kind Code:
B2
Abstract:

To provide a semiconductor device enabling an efficient heat dissipation not only from the topmost LSI chip but also from the LSI chips of the lower part in a laminated of two or more LSI chips.

In the semiconductor device with two or more LSI chips 2 overlying a relay substrate 1, thermally conductive underfill resin 10 is formed between LSI chips 2 adjoined up and down, or between the lower surface of the lowermost LSI chip and substrate 1. Generated heat of the LSI chip 2 is radiated to the external atmosphere by contacting the surface of the topmost LSI chip 2, and each side of the LSI chip 2 and the side of thermally conductive underfill resin 10, respectively, and by reaching the heat sink 8, with the opposite side front surface of the LSI chip 2 of heat dissipating sheet 9 in contact with inside, through the heat dissipation sheet 9. The heat sink 8 covers the whole laminated structure as well.

COPYRIGHT: (C)2006,JPO&NCIPI


Inventors:
Kenji Fukuda
Application Number:
JP2005370199A
Publication Date:
May 14, 2008
Filing Date:
December 22, 2005
Export Citation:
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Assignee:
NEC
International Classes:
H01L25/065; H01L23/36; H01L25/07; H01L25/18
Domestic Patent References:
JP2001168255A
JP11054973A
JP2004111656A
JP2002261232A
JP2002353388A
JP2003283144A
JP2003188342A
JP2001189412A
JP2002176135A
Attorney, Agent or Firm:
Kaneyuki Matsuura