Title:
ビットストリングの照合方法および装置
Document Type and Number:
Japanese Patent JP4091604
Kind Code:
B2
Abstract:
In a bit string check method, a bit string to be searched is divided into a plurality of partial-object bit strings, which are compared to the plurality of registration bit patterns at multiple stages. At a current stage which is one of the multiple check stages, comparison is made with all the possible values of a partial-object bit string in accordance with the comparison result and the pattern table where a plural registration bit pattern is registered, it is possible to obtain a judgment result indicating a presence or absence of a partial registration bit pattern which matches at least the partial-object bit string. According to the judgment result, check-continuation information including the address of the pattern table of the stage subsequent to the current stage is outputted.
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Inventors:
Tetsuro Sato
Kawaguchi Grammar
Kawaguchi Grammar
Application Number:
JP2004541281A
Publication Date:
May 28, 2008
Filing Date:
October 03, 2003
Export Citation:
Assignee:
Infor S Co., Ltd.
International Classes:
G06F7/04; G06F17/30; H04L45/748
Domestic Patent References:
| JP10257066A | ||||
| JP200216638A | ||||
| JP8212790A |
Other References:
鹿島 和幸,曽田 圭一,森木 嘉宏,市橋 立機,安部 哲也,IPルーチングテーブルのハードウェアによる高速検索方式,1998年電子情報通信学会 通信ソサイエティ大会 B-7-123,1998年 9月 7日
Attorney, Agent or Firm:
Shinkichi Matsumoto