To integrate a nonvolatile memory cell array and two kinds of MIS(metal insulator semiconductor) transistor circuits, which are different in the thickness of the gate insulator film in a simple process to exhibit desired characteristics, respectively.
Forming of wells 3, 4 and ion implantation for a high breakdown voltage circuit portion are carried out. After a tunnel oxide 6 of the laminated-layer gate nonvolatile memory cell array and a polysilicon film 7 and ONO film 8 are formed as a floating gate, the tunnel oxide 6, the polysilicon film 8 and the ONO film 8 are left in the memory cell array region selectively; and the surface of a silicon substrate 1 is exposed in the high breakdown voltage circuit portion and low breakdown voltage circuit portion to form a first gate oxide 9. In the low breakdown voltage circuit portion, forming of wells 10, 11 and controlling of channels are carried out with the first gate oxide as a sacrificial oxide, using ion implantation at the same time. Then, the first gate oxide of the low breakdown voltage circuit portion is removed, and a second gate oxide 12 is formed in the low breakdown voltage circuit portion.
COPYRIGHT: (C)2004,JPO
Masanobu Saito
Norihisa Arai
Youichi Oshima
Toshiba Corporation
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