Title:
半導体加工方法および加工装置
Document Type and Number:
Japanese Patent JP4181561
Kind Code:
B2
Abstract:
A secondary electron image generated by an electron beam is detected by a secondary electron/secondary ion detector while a silicon substrate is etched by a focused ion beam from a back surface of a semiconductor chip. A time point where the electron beam transmits through the silicon substrate, a contrast of a secondary electron image of a separation layer, a polysilicon layer and the like is detected by a picture image processing system is assumed to be a processing end point. At this time, by changing a setting for an acceleration voltage of the electron beam, an arbitrary remaining silicon thickness can be obtained.
Inventors:
Yuichi Kitamura
Naoto Sugiura
Naoto Sugiura
Application Number:
JP2005139725A
Publication Date:
November 19, 2008
Filing Date:
May 12, 2005
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H01L21/302; B23K15/00; B23K101/42
Domestic Patent References:
| JP5290786A | ||||
| JP2002298774A |
Attorney, Agent or Firm:
Hiroshi Maeda
Hiroshi Koyama
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Atsushi Fujita
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Yoneda Keikei
Seki Kei
Yasuya Sugiura
Hiroshi Koyama
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Atsushi Fujita
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Yoneda Keikei
Seki Kei
Yasuya Sugiura