Title:
半導体基板の化学機械研磨方法
Document Type and Number:
Japanese Patent JP4187497
Kind Code:
B2
Abstract:
The object of the present invention is to provide a process for chemical mechanical polishing of semiconductor substrate that is particularly useful for chemical mechanical polishing a wafer having a wiring pattern and an insulating layer having a low dielectric constant is formed between wiring patterns, interlayers in the case of a multi-layer wiring and the like in the process of producing a semiconductor device, and an aqueous dispersion for chemical mechanical polishing which is used in this process. The process for chemical mechanical polishing of a semiconductor substrate of the present invention is that a surface to be polished of the semiconductor substrate is polished under conditions of a rotation speed of a polishing table fixing a polishing pad at the range from 50 to 200 rpm and a pressing pressure of the semiconductor substrate fixed to a polishing head against a polishing pad at the range from 700 to 18,000Pa, by using an aqueous dispersion for chemical mechanical polishing comprising an abrasive and at least one compound selected from the group consisting of polycarboxylic acid having a heterocycle and anhydride thereof, and the polishing pad.
Inventors:
Tomohisa Konno
Masayuki Motonari
Masayuki Hattori
Nobuo Kawahashi
Masayuki Motonari
Masayuki Hattori
Nobuo Kawahashi
Application Number:
JP2002293223A
Publication Date:
November 26, 2008
Filing Date:
October 07, 2002
Export Citation:
Assignee:
JSR CORPORATION
International Classes:
H01L21/304; B24B37/00; C09G1/02; C09K3/14; H01L21/321
Domestic Patent References:
| JP2001269859A | ||||
| JP2001196336A | ||||
| JP2001152135A | ||||
| JP2001176829A | ||||
| JP2000306874A | ||||
| JP2001007059A |
Attorney, Agent or Firm:
Mitsue Obuchi