半導体記憶装置 - Fujitsu Microelectronics Limited

Title:

半導体記憶装置

Document Type and Number:

Japanese Patent JP4212760

Kind Code:

B2

Abstract:

The present invention provides a semiconductor memory device that performs a highly reliable data read operation at a high speed. This semiconductor memory device reads data stored in memory cells in accordance with a result of a comparison between a signal read out from the memory cells, which are connected to a word line, with a signal read out from a reference cell connected to a reference word line. This semiconductor memory device includes a load capacity adjustment circuit that adjusts the timing of starting up the gate of the reference cell in accordance with each location of the connection of the memory cells to the word line.

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Inventors:

Yoshikazu Honma
Tetsuji Takeguchi

Application Number:

JP2000166322A

Publication Date:

January 21, 2009

Filing Date:

June 02, 2000

Export Citation:

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