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Title:
光電変換装置用の走査回路
Document Type and Number:
Japanese Patent JP4241692
Kind Code:
B2
Abstract:

To reduce influence, caused by noise from a logic circuit part, upon a buffer circuit part in a shift register having the logic circuit part and the buffer circuit part.

In a shift register having, on the same semiconductor substrate, a logic circuit part for supplying sequential pulses, based on a supplied clock signal and a buffer circuit part for performing impedance conversion with the sequential pulses from the logic circuit part as input signals, the shift register includes a first conductive type second semiconductor area formed in a first conductivity-type first semiconductor area to which a ground level for the buffer circuit is supplied, and a first conductivity-type fourth semiconductor region formed in a first conductivity-type third semiconductor region to which a ground level for the logic circuit part is supplied, wherein the first semiconductor region and the third semiconductor region are separated by a second conductive type fifth semiconductor region.

COPYRIGHT: (C)2006,JPO&NCIPI


Inventors:
Takumi Hiyama
Toru Koizumi
Daisuke Fujimura
Katsuhito Sakurai
Application Number:
JP2005233875A
Publication Date:
March 18, 2009
Filing Date:
August 12, 2005
Export Citation:
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Assignee:
Canon Inc
International Classes:
H01L27/146; H04N5/335; H04N5/365; H04N5/369; H04N5/374
Domestic Patent References:
JP2001111900A
JP6163823A
Attorney, Agent or Firm:
Keizo Nishiyama
Yuichi Uchio



 
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