Title:
半導体デバイスの製造方法及びその製造システム
Document Type and Number:
Japanese Patent JP4302965
Kind Code:
B2
Abstract:
Disclosed are a method and a system for manufacturing a semiconductor device by which it is possible to manufacture a semiconductor device while enabling evaluation of a manufacturing process for a super-miniaturized actual circuit pattern at a high speed by utilizing a three-dimensional measuring technique based on the use of an optical scatterometry apparatus. The method of manufacturing a semiconductor device comprising the step of forming a test pattern and an actual circuit pattern by a predetermined semiconductor manufacturing process, to thereby manufacture a product semiconductor device, wherein features of the three-dimensional shape of the test pattern formed in the product semiconductor device are measured by use of the optical scatterometry apparatus, and the semiconductor manufacturing process for the actual circuit pattern of the product semiconductor device is thereby evaluated.
Inventors:
Ryo Nakagaki
Kenji Watanabe
Yuya Toyoshima
Chie Shishido
Yuji Takagi
Maki Tanaka
Kenji Watanabe
Yuya Toyoshima
Chie Shishido
Yuji Takagi
Maki Tanaka
Application Number:
JP2002319833A
Publication Date:
July 29, 2009
Filing Date:
November 01, 2002
Export Citation:
Assignee:
Hitachi High-Technologies Corporation
International Classes:
H01L21/027; G03F7/20; H01L21/3205; H01L21/66; H01L23/544
Domestic Patent References:
| JP6026833A | ||||
| JP2004529330A | ||||
| JP2002190443A | ||||
| JP11204404A | ||||
| JP9017720A |
Attorney, Agent or Firm:
Polaire Patent Business Corporation
Katsuo Ogawa
Kyosuke Tanaka
Katsuo Ogawa
Kyosuke Tanaka