Title:
高電圧ディジタル/アナログ変換器内の低電圧CMOSスイッチを切り換える方法および装置
Document Type and Number:
Japanese Patent JP4358450
Kind Code:
B2
Abstract:
A varying power supply range, that can exceed the breakdown voltage of switches within a DAC, is used to generate positive and negative generated OFF voltages substantially fixed and less than the breakdown voltage to accommodate a wide range of analog reference voltages and power supply voltages. The digital input signal having digital input levels is received by a TTL/CMOS input receiver and level shifted to logic levels having the positive and negative generate voltage levels. A circuit matches switch resistance and forms positive and negative switch ON voltage levels from the voltage levels of the input positive and negative analog reference levels. Switch drivers properly drive control terminals of the switches with appropriate voltage levels avoiding switch breakdown in response to the digital input signal.
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Inventors:
Fan, gary jii
David, Casteneda
Chow Duri, Rahim Ehu
David, Casteneda
Chow Duri, Rahim Ehu
Application Number:
JP2000617561A
Publication Date:
November 04, 2009
Filing Date:
December 28, 1999
Export Citation:
Assignee:
Maxim Integrated Products Incorporated
International Classes:
H03M1/78; H03K17/687; H03M1/06
Domestic Patent References:
| JP11191737A | ||||
| JP8046515A | ||||
| JP11353889A | ||||
| JP3101048U |
Foreign References:
| WO1997043833A1 |
Attorney, Agent or Firm:
Masaki Yamakawa