Title:
TFT、電気回路、電子デバイス、および電子機器、ならびにそれらの製造方法
Document Type and Number:
Japanese Patent JP4363425
Kind Code:
B2
Abstract:
A method of fabricating a TFT, including: (a) forming a gate electrode on a predetermined portion of an underlying layer, (b) covering the gate electrode with a dielectric layer so that the dielectric layer defines two indented regions and a protruding region that separate the two indented regions from each other, (c) making a top surface of the protruding region oleophobic or hydrophobic, (d) providing a functional liquid containing a conductive material in the two indented regions after step (c), (e) heating or drying the functional liquid so as to form a source electrode and a drain electrode containing the conductive material; and (f) forming a semiconductor layer that is electrically coupled with the source electrode and the drain electrode.
Inventors:
Shampuri
Application Number:
JP2006210595A
Publication Date:
November 11, 2009
Filing Date:
August 02, 2006
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
H01L21/336; H01L29/786
Domestic Patent References:
| JP2006510210A | ||||
| JP2005064249A |
Attorney, Agent or Firm:
Masahiko Ueyanagi
Kazuhiko Miyasaka
Kazuhiko Miyasaka