To provide a pattern generation method capable of increasing the pattern coverage rate of the peripheral region of an isolated pattern.
After a wiring pattern arranged on an interlayer dielectric film and the wiring layout and hole layout of a hole pattern embedded in the interlayer dielectric film are obtained, the hole pattern is extracted, which is connected with the wiring pattern from the hole layout in a pattern processing region where the wiring pattern is arranged in the same wiring layer. A primary processing region is extracted so that the hole pattern may be included, and the pattern coverage rate of the wiring pattern included in the primary processing region is computed. After that, additional patterns are generated in the primary processing region based on the pattern coverage rate.
COPYRIGHT: (C)2006,JPO&NCIPI
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