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Title:
セラミック電子部品の製造方法
Document Type and Number:
Japanese Patent JP4442135
Kind Code:
B2
Abstract:

To obtain ceramic electronic parts wherein a plated electrode is excellently formed on a baked electrode formed on an end surface of a ceramic substrate, and it has no deterioration of characteristics thereof due to a plating solution.

A laminated ceramic capacitor 10 includes a substrate 12 composed of a dielectric ceramic layer 14 and an internal electrode layer 16. An external electrode 18 is formed on an end surface of the substrate 12, which is composed of a first baked electrode 20, a second baked electrode 22, a first plated electrode 24, and a second plated electrode 24. The first baked electrode 20 includes metal powder, glass frit, and SiO2as solid fractions, and contents of the SiO2are formed by baking conductive paste of 0.5 to 3 weight% in the solid fractions of 100 weight% at 840°C or above. The second baked electrode 22 is formed by baking the conductive paste including the metal powder and the glass frit at a temperature below 840°C.

COPYRIGHT: (C)2004,JPO


Inventors:
Yoshinori Saito
Kazuaki Kawabata
Tomotaka Hirata
Takaya Kato
Hiroshi Sekido
Application Number:
JP2003200853A
Publication Date:
March 31, 2010
Filing Date:
July 24, 2003
Export Citation:
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Assignee:
MURATA MANUFACTURING CO.,LTD.
International Classes:
H01G4/12; H01G4/252
Domestic Patent References:
JP9007877A
JP11260147A
JP59069907A
JP11251204A
JP9007878A
JP2002279828A
JP2002056717A
Attorney, Agent or Firm:
Masahiro Okada