Title:
マップテーブルを使用して入出力モジュールにアクセスする方法
Document Type and Number:
Japanese Patent JP4445708
Kind Code:
B2
Abstract:
A method of accessing a plurality of memories and a plurality of input/output modules includes providing at least one map table, including a plurality of entries. Each entry includes an entry type identifier and a plurality of entry items. A first logical address including a plurality of address bits is received. An entry in the at least one map table is identified based on a first set of the address bits. A type of the identified entry is determined based on the entry type identifier of the identified entry. An entry item in the identified entry is identified based on a second set of the address bits if the entry type identifier indicates an input/output type entry. An entry item in the identified entry is identified based on a third set of the address bits if the entry type identifier indicates a memory type entry.
Inventors:
Ashish Gapta
Devendra Das Sharma
Devendra Das Sharma
Application Number:
JP2003043570A
Publication Date:
April 07, 2010
Filing Date:
February 21, 2003
Export Citation:
Assignee:
HEWLETT-PACKARD COMPANY
International Classes:
G06F12/06; G06F13/14; G06F15/167; G06F15/173
Domestic Patent References:
| JP8101792A | ||||
| JP62131351A | ||||
| JP8101802A | ||||
| JP5113930A | ||||
| JP10301842A | ||||
| JP4191943A | ||||
| JP2000330865A |
Foreign References:
| WO1999024906A1 |
Attorney, Agent or Firm:
Next student Okada
Naoya Fushimi
Yukari Hirano
Naoya Fushimi
Yukari Hirano