Title:
強誘電体メモリの製造方法
Document Type and Number:
Japanese Patent JP4497312
Kind Code:
B2
Abstract:
A method of manufacturing a ferroelectric memory includes: (a) stacking a lower electrode layer, a ferroelectric layer, and an upper electrode layer on a base in that order to form a ferroelectric laminate; (b) patterning the ferroelectric laminate to form a ferroelectric capacitor; (c) forming a first barrier film which covers the ferroelectric capacitor by physical vapor deposition (PVD); and (d) forming a second barrier film which covers the first barrier film by chemical vapor deposition (CVD).
Inventors:
Akito Matsumoto
Toshiyuki Kamiya
Kenji Yamada
Eiji Natori
Tomoo Kinoshita
Toshiyuki Kamiya
Kenji Yamada
Eiji Natori
Tomoo Kinoshita
Application Number:
JP2005234410A
Publication Date:
July 07, 2010
Filing Date:
August 12, 2005
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
H01L21/8246; H01L27/105
Domestic Patent References:
| JP2001111007A | ||||
| JP2001230382A | ||||
| JP2004087978A | ||||
| JP2005327847A | ||||
| JP2006310637A | ||||
| JP2006157062A |
Attorney, Agent or Firm:
Yukio Fuse
Mitsue Obuchi
Mitsue Obuchi