Title:
電圧制御半導体装置のためのSiC層中にチャンネル領域層を形成する方法
Document Type and Number:
Japanese Patent JP4502407
Kind Code:
B2
Abstract:
In a method for producing a channel region layer in a SiC-layer for producing a voltage controlled semiconductor device n-type dopants and p-type dopants are implanted into a near-surface layer of the SiC layer. The p-type dopants implanted have a higher diffusion rate in SiC than the n-type dopants implanted. The SiC-layer is then heated at such a temperature that p-type dopants implanted diffuse from the near-surface layer into the surrounding regions of the SiC-layer being lightly n-doped to such a degree that a channel region layer in which p-type dopants dominates is created.
Inventors:
Harris, Christopher
Application Number:
JP50590598A
Publication Date:
July 14, 2010
Filing Date:
June 09, 1997
Export Citation:
Assignee:
Cree, Inc.
International Classes:
H01L21/265; H01L29/78; H01L21/04; H01L21/22; H01L21/335; H01L21/336; H01L29/12; H01L29/24; H01L29/739
Domestic Patent References:
| JP6151860A | ||||
| JP58210678A |
Foreign References:
| US5338945 |
Attorney, Agent or Firm:
Hideto Asamura
Hajime Asamura
Katsunori Ando
Yukihiro Ikeda
Hajime Asamura
Katsunori Ando
Yukihiro Ikeda