ビット線コンタクトおよびその形成方法 - INTERNATIONAL BUSINESS MASCHINES CORPORATION

Title:

ビット線コンタクトおよびその形成方法

Document Type and Number:

Japanese Patent JP4521150

Kind Code:

B2

Abstract:

A bitline contact and method of forming bitline contact for a vertical DRAM array using a bitline contact mask. In the method, gate conductor lines are formed. An oxide layer is deposited over the gate conductor lines, and a bitline contact mask is formed over portions of the oxide layer. The bitline contact mask is etched, and a silicon layer is deposited on the substrate. A bitline layer is deposited on the silicon layer. A masking and etching operation is performed on the bitline layer. A M0 metal is deposited over the silicon layer and on sides of non etched portions of the bitline (M0) layer to form left and right bitlines.

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Inventors:

Larry A. Nesbitt
Jonathan E. Fortermeier
Ramachandra Divacarni
Wolfgang Bergner

Application Number:

JP2002002654A

Publication Date:

August 11, 2010

Filing Date:

January 09, 2002

Export Citation:

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Assignee:

INTERNATIONAL BUSINESS MASCHINES CORPORATION
Infineon Technologies North America Corp.

International Classes:

H01L21/768; H01L21/8242; H01L21/28; H01L21/60; H01L27/108

Domestic Patent References:

JP2000208739A
JP547935A
JP1187641A
JP11354748A

Foreign References:

WO2000019525A1

Attorney, Agent or Firm:

Takeshi Ueno
Tasaichi Tanae
Yoshihiro City
Hiroshi Sakaguchi
Yasuhiro Noguchi
Yasuhiro Noguchi
Hiroshi Sakaguchi

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