Title:
パターン電極を備えた多孔質誘電体基板の製造方法
Document Type and Number:
Japanese Patent JP4577715
Kind Code:
B2
Abstract:
A method for manufacturing a porous dielectric substrate including patterned electrodes includes a patterned electrode-forming step of preparing a support plate having a releasable flat face and then forming the patterned electrodes on the flat face, a porous dielectric substrate-forming step of feeding a material for forming the porous dielectric substrate onto the flat face having the patterned electrodes arranged thereon to form the porous dielectric substrate in which the patterned electrodes are embedded, and a separation step of separating the support plate from the porous dielectric substrate having the patterned electrodes embedded therein. In the patterned electrode-forming step, the patterned electrodes formed on the flat face are processed to have rough surfaces in the patterned electrode-forming step. Alternatively, after the flat face is coated with a releasing agent, the patterned electrodes are formed on the resulting flat face.
Inventors:
Maruyama Masakatsu
Fukumoto Yoshito
Manabe Chitaka
Fukumoto Yoshito
Manabe Chitaka
Application Number:
JP2005000480A
Publication Date:
November 10, 2010
Filing Date:
January 05, 2005
Export Citation:
Assignee:
KABUSHIKI KAISHA KOBE SEIKO SHO
International Classes:
H05K3/20
Domestic Patent References:
| JP2004319976A | ||||
| JP2000357625A | ||||
| JP5275834A | ||||
| JP2004182836A | ||||
| JP1084186A | ||||
| JP341803A | ||||
| JP194691A |
Attorney, Agent or Firm:
Honda Tatsuo