Title:
ウエハを処理する方法、及び半導体ウエハを処理するためのシステム
Document Type and Number:
Japanese Patent JP4640879
Kind Code:
B2
Abstract:
According to one aspect of the invention, a method of processing a wafer is provided. The wafer is located in a wafer processing chamber of a system for processing a wafer. A silicon layer is then formed on the wafer while the wafer is located in the wafer processing chamber. The wafer is then transferred from the wafer processing chamber to a loadlock chamber of the system. Communication between the processing chamber and the loadlock chamber is closed off. The wafer is then exposed to ozone gas while located in the loadlock chamber, whereafter the wafer is removed from the loadlock chamber out of the system.
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Inventors:
David K. Carlson
Paul B. Comita
Norma Bee. Relay
Dale Earl. Dubois
Paul B. Comita
Norma Bee. Relay
Dale Earl. Dubois
Application Number:
JP2000208618A
Publication Date:
March 02, 2011
Filing Date:
July 10, 2000
Export Citation:
Assignee:
APPLIED MATERIALS,INCORPORATED
International Classes:
H01L21/205; C01B13/10; C30B33/00; H01L21/00; H01L21/677
Domestic Patent References:
JP8031763A | ||||
JP4332130A | ||||
JP8111449A | ||||
JP4196119A | ||||
JP5275344A | ||||
JP7086271A | ||||
JP8055805A | ||||
JP10050701A | ||||
JP7211761A |
Attorney, Agent or Firm:
Sonoda Yoshitaka
Kobayashi Yoshinori
Yoshiki Hasegawa
Yuichi Yamada
Kobayashi Yoshinori
Yoshiki Hasegawa
Yuichi Yamada