Title:
積層コンデンサ及びモールドコンデンサ
Document Type and Number:
Japanese Patent JP4654854
Kind Code:
B2
Abstract:
A multilayer capacitor 1 has a laminated body 20 configured by laminating a plurality of dielectric substrates 2 each having a plurality of internal electrodes 3 and 5 formed on its main surface and a capacitance component is generated between the facing internal electrodes 3 and 5. The dielectric constant of the dielectric substrate located at a central portion of a lamination direction of the laminated body 20 is lower than that of the dielectric substrate 2 located at the edge of the lamination direction.
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Inventors:
日▲高▼ 晃男
Yuichi Murano
Shinichi Wakasugi
Yuichi Murano
Shinichi Wakasugi
Application Number:
JP2005264966A
Publication Date:
March 23, 2011
Filing Date:
September 13, 2005
Export Citation:
Assignee:
Panasonic Corporation
International Classes:
H01G4/12; H01G4/30
Domestic Patent References:
| JP59090915A | ||||
| JP9180956A | ||||
| JP64069007A | ||||
| JP3187209A | ||||
| JP7235450A | ||||
| JP2021610A | ||||
| JP2002237429A | ||||
| JP8316086A | ||||
| JP2004039840A | ||||
| JP9298127A | ||||
| JP62094907A | ||||
| JP2003272946A | ||||
| JP2003007561A |
Attorney, Agent or Firm:
Hiroki Naito
Daisuke Nagano
Kentaro Fujii
Daisuke Nagano
Kentaro Fujii