Title:
マイクロコンピュータ及び電子制御装置
Document Type and Number:
Japanese Patent JP4665846
Kind Code:
B2
Abstract:
In a microcomputer for executing at least one task in normal operation mode, a reset pin is provided. The microcomputer is configured to be reset upon a reset signal with an active level being inputted to the reset pin. A first clock generator is configured to generate a first clock with a first frequency. The microcomputer operates on the first clock as its operation clock. A disabling unit is electrically connected to the reset pin and configured to, upon the reset signal with the active level being input to the reset pin, disable the first clock generator.
Inventors:
Minoru Kobayashi
Application Number:
JP2006171733A
Publication Date:
April 06, 2011
Filing Date:
June 21, 2006
Export Citation:
Assignee:
株式会社デンソー
International Classes:
G06F15/78; G06F1/04
Domestic Patent References:
| JP4349516A | ||||
| JP1211013A | ||||
| JP5035359A | ||||
| JP3006718A | ||||
| JP10003409A | ||||
| JP62187905A | ||||
| JP2003050750A |
Attorney, Agent or Firm:
Tsutomu Adachi