Title:
島状の分散構造を備えた半導体チップおよびその製造方法
Document Type and Number:
Japanese Patent JP4677331
Kind Code:
B2
Abstract:
The present invention has an object to provide a semiconductor chip of high reliability with less risk of breakage. Specifically, the present invention provides a semiconductor chip having a semiconductor silicon substrate including a semiconductor device layer and a porous silicon domain layer, the semiconductor device layer being provided in a main surface region on one surface of the semiconductor silicon substrate, the porous silicon domain layer being provided in a main surface region on a back surface which is the other surface of the semiconductor silicon substrate, and the porous silicon domain layer having porous silicon domains dispersed like islands in the back surface of the semiconductor silicon substrate.
Inventors:
Oyun Yunori
Shigeru Aoki
Shigeru Aoki
Application Number:
JP2005345056A
Publication Date:
April 27, 2011
Filing Date:
November 30, 2005
Export Citation:
Assignee:
Elpida Memory Co., Ltd.
International Classes:
H01L21/02
Domestic Patent References:
| JP2002344012A | ||||
| JP2001358154A | ||||
| JP2000353797A | ||||
| JP60148128A |
Attorney, Agent or Firm:
Akio Miyazaki
Ishibashi Masayuki
Masaaki Ogata
Ishibashi Masayuki
Masaaki Ogata