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Title:
半導体装置
Document Type and Number:
Japanese Patent JP4693870
Kind Code:
B2
Abstract:

To suppress power consumption by leak current of a block in which the power source is intermittently turned on/off in a semiconductor.

This semiconductor device 1 is provided with an error check necessity determining means 4, and is configured to determine the necessity of error check on the basis of notification from an error check necessity notifying means 6 provided in a block 2 where the power is not disconnected, and to perform error check of data loaded from an external memory means when an error check executing means 5 is booted according to the determination. Since all of the error check can not be eliminated, one-time forced execution is performed in each of the number booting times set by an error check interval setting means 7 to secure the reliability of the system. Consequently, a period when the semiconductor device intermittently operates can be shortened by only an error check time so that useless leak current consumption can be suppressed.

COPYRIGHT: (C)2009,JPO&INPIT


Inventors:
Koichi Kuroiwa
Shoji Taniguchi
Masami Kanasugi
Application Number:
JP2008149133A
Publication Date:
June 01, 2011
Filing Date:
June 06, 2008
Export Citation:
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Assignee:
Fujitsu Semiconductor Limited
International Classes:
G06F15/78; G06F11/22; H04M1/73; H04W52/02
Domestic Patent References:
JP60200345A
JP8255040A
JP9204369A
JP8153047A
JP3263233A
JP64031235A
JP59178552A
Attorney, Agent or Firm:
Takeshi Hattori