Title:
駆動回路及び電圧ドライバ
Document Type and Number:
Japanese Patent JP4770001
Kind Code:
B2
Abstract:
The objective of this invention is to compensate or avoid the influence of offset in an easy and efficient manner, to correctly match the voltage of the output signal with the voltage of the input signal, that is, the target value, and to significantly reduce the current consumption. When voltage follower 32 L supplies bias voltage VBn to each of constant current source circuits 58 L, 60 L, it acts as a source-type voltage follower. However, when the bias voltage applied to each of constant current source circuits 58 L, 60 L is changed from VBn to Vss of the power supply voltage level, each of constant current source circuits 58 L, 60 L is turned off, and no current flows through them. When the constant current source circuit 58 is turned off in differential input part 44 L, the potential at the output terminal (node) NL rises almost to the level of the power supply voltage Vdd. In this way, the driving transistor 62 L is also turned off in output part 46 L.
Inventors:
Fukuda Yasuhiro
Application Number:
JP2000187771A
Publication Date:
September 07, 2011
Filing Date:
June 22, 2000
Export Citation:
Assignee:
Texas Instruments Japan Ltd.
International Classes:
G02F1/133; G09G3/36; G09G3/20; G11C19/00; H03F1/02; H03F3/34; H03F3/72
Domestic Patent References:
| JP11305735A |
Foreign References:
| WO2001059750A1 |