Title:
半導体素子のデータ入力バッファ
Document Type and Number:
Japanese Patent JP4857447
Kind Code:
B2
Abstract:
The present invention provides a semiconductor design technology, in particular a data input buffer for use therein. This data input buffer secures a data level sensing margin in a weak data transmission cycle upon an asymmetrical data pattern transmission. Specifically, the present invention provides a technology of improving a level sensing margin in a weak data transmission cycle following after adjusting a reference level for input sensing by a constant level toward a strong data direction in a strong data transmission cycle (in case of repeating data with same polarity) by tracing a pattern of transmission data. Further, the present invention employs a method of adjusting an amount of current that flows in a data input part and a reference voltage input part to make a pull-up/pull-down of the reference level without a change of the reference voltage that is constant voltage.
Inventors:
Ginger Heifuku
An Shin Hiro
An Shin Hiro
Application Number:
JP2005172759A
Publication Date:
January 18, 2012
Filing Date:
June 13, 2005
Export Citation:
Assignee:
HYNIX SEMICONDUCTOR INC.
International Classes:
H03K19/0175; H03K19/003
Domestic Patent References:
| JP2000174609A | ||||
| JP9238167A | ||||
| JP2003527042A |
Attorney, Agent or Firm:
Ichiro Kudo