Title:
クロック再生装置及び方法
Document Type and Number:
Japanese Patent JP4888393
Kind Code:
B2
Abstract:
A common mode of a waveform of a duobinary transmission signal (IN) is set to 0 and the size of a data eye is set to Veye; and reference potentials Vref_H and Vref_L are set to the following values: Veye/√{square root over (3)}≰Vref—H≰Veye/√{square root over (2)} (1) −Veye/√{square root over (2)}≰Vref—L≰−Veye/√{square root over (3)} (2) More particularly, effect becomes remarkable by setting the reference potentials Vref_H and Vref_L to central values in ranges shown in Equations (1) and (2), respectively. In the central values, fluctuation (jitter) of transition data becomes the smallest, and a jitter characteristic of a reproducing clock becomes the best. Consequently, a clock reproducing apparatus in which a received clock from duobinary transmission data is reproduced with high accuracy is provide.
Inventors:
Kazuhisa Sunaga
Koichi Yamaguchi
Fukaishi Sosei
Koichi Yamaguchi
Fukaishi Sosei
Application Number:
JP2007537666A
Publication Date:
February 29, 2012
Filing Date:
September 28, 2006
Export Citation:
Assignee:
NEC
International Classes:
H04L7/02; H03D13/00; H03L7/06; H03L7/091
Domestic Patent References:
| JP6176498A | ||||
| JP362753A | ||||
| JP6460132A | ||||
| JP104436A |
Attorney, Agent or Firm:
Michio Nagai
Masao Sekiguchi
Takamasa Nakano
Masao Sekiguchi
Takamasa Nakano