Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5065586
Kind Code:
B2
Abstract:
In a method for manufacturing a semiconductor module, a metal layer is formed on a support substrate. Then, first conductive posts and a first insulating layer are formed on the metal layer. The first insulating layer surrounds the sides of the first conductive posts. Then, second conductive posts are formed above the first conductive posts. The second conductive posts are electrically connected to the first conductive posts. Then, a second insulating layer is formed so as to cover the second conductive posts. The second insulating layer is made of adhesive resin. Finally, a semiconductor device is adhered to the second conductive posts by the second insulating layer while a gap between the first semiconductor device and the first insulating layer is sealed by the second insulating layer.
Inventors:
Yoichiro Kurita
Yasushi Soejima
Renya Kawano
Yasushi Soejima
Renya Kawano
Application Number:
JP2005303395A
Publication Date:
November 07, 2012
Filing Date:
October 18, 2005
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H01L21/56; H01L21/60; H01L25/065; H01L25/07; H01L25/18
Domestic Patent References:
| JP2000022040A | ||||
| JP2002110717A | ||||
| JP2003332508A |
Attorney, Agent or Firm:
Shinji Hayami
Kana Nomoto
Satoshi Amagi
Kana Nomoto
Satoshi Amagi