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Title:
電気光学装置用基板の製造方法及び電気光学装置の製造方法
Document Type and Number:
Japanese Patent JP5070724
Kind Code:
B2
Abstract:

To provide a manufacturing method of a substrate for an electro-optical device with which an electro-optical device can be easily manufactured even if the number of pixels increases due to higher resolution of the electro-optical device, by processing an insulating layer in a short time with a simple device to form an opening; and to provide a manufacturing method of the electro-optical device.

In the manufacturing method of the substrate for the electro-optical device; a source electrode 14, a drain electrode 16, and an organic semiconductor layer 18 are formed on a substrate 12. A gate insulating film 20 is formed for covering the source electrode 14, the drain electrode 16, and the organic semiconductor layer 18. A gate electrode 22 is formed on the gate insulating layer 20. An interlayer insulating layer 24 for covering the gate insulating layer 20 and the gate electrode 22 is formed. The opening piercing at least the interlayer insulating layer 24 and the gate insulating layer 20 and allowing one part of the drain electrode 16 to expose is formed using a mechanical stress. A pixel electrode 28 electrically connected to the drain electrode 16 through the opening is formed on the interlayer insulating layer 24.

COPYRIGHT: (C)2008,JPO&INPIT


Inventors:
Tsutomu Miyamoto
Koichi Saito
Application Number:
JP2006088290A
Publication Date:
November 14, 2012
Filing Date:
March 28, 2006
Export Citation:
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Assignee:
Seiko Epson Corporation
International Classes:
H01L29/786; G02F1/167; G02F1/17; G09F9/00; G09F9/30; G09F9/37; H01L21/28; H01L21/336; H01L21/768; H01L51/05
Domestic Patent References:
JP2005109390A
JP2002055359A
JP10260413A
JP5055402A
JP5138261A
JP2001264815A
JP2006032601A
JP4327322A
JP2001249627A
Attorney, Agent or Firm:
Masahiko Ueyanagi
Osamu Suzawa



 
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