Title:
アライメントキーを有する半導体素子及びその製造方法
Document Type and Number:
Japanese Patent JP5100961
Kind Code:
B2
Abstract:
Disclosed is a semiconductor device having an align key and a method of fabricating the same. The semiconductor device includes a semiconductor substrate having a cell area and an align key area. An isolation layer that defines a cell active area is disposed in the cell area of the semiconductor substrate. A cell charge storage layer pattern is disposed across the cell active area. An align charge storage layer pattern is disposed in the align key area of the semiconductor substrate. An align trench self-aligned with the align charge storage layer pattern is formed in the align key area of the semiconductor substrate.
Inventors:
Kim Sou
So Tora Go
Akira Kim
Lee Castle U
Gold dragon
Lee Doo
Hiroshi Kinari
So Tora Go
Akira Kim
Lee Castle U
Gold dragon
Lee Doo
Hiroshi Kinari
Application Number:
JP2004334328A
Publication Date:
December 19, 2012
Filing Date:
November 18, 2004
Export Citation:
Assignee:
Samsung Electronics Co.,Ltd.
International Classes:
H01L21/027; H01L27/10; H01L21/336; H01L21/8247; H01L23/544; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP2306666A | ||||
| JP2001102440A | ||||
| JP63237433A | ||||
| JP8106791A | ||||
| JP2001036036A |
Attorney, Agent or Firm:
Hatta International Patent Corporation
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