Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5103006
Kind Code:
B2
Abstract:
A method of manufacturing a semiconductor device includes forming a second insulating layer over a first insulating layer, forming a mask over the second insulating layer, after the forming the mask, a first etching of the second insulating layer which is not covered by the mask, and after the first etching, a second etching of the second insulating layer and the first insulating layer which are not covered by the mask. At the first etching, the second insulating layer left over the first insulating layer and the first insulating layer is not exposed. At the second etching, the left over second insulating layer and the first insulating layer are etched. The first insulating layer has a lower dielectric constant than the second insulating layer. A second etching condition of the second etching includes a larger flow rate of oxygen than a first etching condition of the first etching.
Inventors:
Southern British High School
Application Number:
JP2006310464A
Publication Date:
December 19, 2012
Filing Date:
November 16, 2006
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H01L21/3065
Domestic Patent References:
| JP2002520853A | ||||
| JP2006032908A | ||||
| JP2006302924A | ||||
| JP2003282536A |
Attorney, Agent or Firm:
Shinji Hayami
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