Title:
半導体装置、半導体ウエハ構造、及び半導体ウエハ構造の製造方法
Document Type and Number:
Japanese Patent JP5104317
Kind Code:
B2
Abstract:
There is provided a semiconductor device including, a semiconductor substrate having a circuit forming region and a peripheral region, a base insulating film formed over the semiconductor substrate, a capacitor formed of a lower electrode, a capacitor dielectric film made of a ferroelectric material, and an upper electrode in this order over the base insulating film in the circuit forming region, an uppermost interlayer insulating film formed over the capacitor, a seal ring formed over the semiconductor substrate in the peripheral region, the seal ring having a height that reaches at least the upper surface of the interlayer insulating film, and surrounding the circuit forming region, a block film formed over the seal ring and over the interlayer insulating film in the circumference of the seal ring, and an electrode conductor pattern which is formed over the interlayer insulating film in the peripheral region, the electrode conductor pattern having an electrode pad, and having a cross-section exposed to a dicing surface.
Inventors:
Takafumi Takafumi
Kenji Kajio
Kenji Kajio
Application Number:
JP2007554766A
Publication Date:
December 19, 2012
Filing Date:
January 18, 2006
Export Citation:
Assignee:
Fujitsu Semiconductor Limited
International Classes:
H01L21/8246; H01L21/66; H01L27/10; H01L27/105
Domestic Patent References:
| JP2003086590A | 2003-03-20 | |||
| JP2001274338A | 2001-10-05 | |||
| JP2005175204A | 2005-06-30 | |||
| JPH07111282A | 1995-04-25 | |||
| JPS62261139A | 1987-11-13 | |||
| JPS60241229A | 1985-11-30 | |||
| JP2003197878A | 2003-07-11 |
Attorney, Agent or Firm:
Keizo Okamoto