Title:
シリコンカーバイドから製造されるモノリシックな縦型接合型電界効果トランジスタおよびショットキーバリアダイオード、および、その製造方法
Document Type and Number:
Japanese Patent JP5105476
Kind Code:
B2
Abstract:
A switching element combining a self-aligned, vertical junction field effect transistor with etched-implanted gate and an integrated antiparallel Schottky barrier diode is described. The anode of the diode is connected to the source of the transistor at the device level in order to reduce losses due to stray inductances. The SiC surface in the SBD anode region is conditioned through dry etching to achieve a low Schottky barrier height so as to reduce power losses associated with the turn on voltage of the SBD.
Inventors:
Mazzola, Michael S.
Melett, Joseph N.
Melett, Joseph N.
Application Number:
JP2007523591A
Publication Date:
December 26, 2012
Filing Date:
July 08, 2005
Export Citation:
Assignee:
SS SS IP, LLC
Mississippi State University
Mississippi State University
International Classes:
H01L21/8232; H01L21/337; H01L21/338; H01L27/06; H01L27/095; H01L27/098; H01L29/47; H01L29/808; H01L29/812; H01L29/872
Domestic Patent References:
| JP2003068760A | ||||
| JP2004006723A | ||||
| JP2004134547A | ||||
| JP10341025A | ||||
| JP2002270620A | ||||
| JP2005520322A |
Foreign References:
| WO2004049449A1 | ||||
| WO2003075319A1 |
Attorney, Agent or Firm:
Hidesaku Yamamoto
Takaaki Yasumura
Natsuki Morishita
Takaaki Yasumura
Natsuki Morishita