Title:
抵抗変化型不揮発性記憶素子の書き込み方法
Document Type and Number:
Japanese Patent JP5184721
Kind Code:
B1
Abstract:
A variable resistance nonvolatile memory element writing method according to the present disclosure includes: (a) changing a variable resistance layer to a low resistance state by applying, to a second electrode, a first voltage which is negative with respect to a first electrode; and (b) changing the variable resistance layer to a high resistance state. Step (b) includes: (i) applying, to the second electrode, a second voltage which is positive with respect to the first electrode; and (ii) changing the variable resistance layer to the high resistance state by applying, to the second electrode, a third voltage, which is negative with respect to the first electrode and is smaller than the absolute value of a threshold voltage for changing the variable resistance layer from the high resistance state to the low resistance state, after the positive second voltage is applied in step (i).
Inventors:
Koji Katayama
Satoshi Mitani
Tsuyoshi Takagi
Satoshi Mitani
Tsuyoshi Takagi
Application Number:
JP2012547390A
Publication Date:
April 17, 2013
Filing Date:
August 09, 2012
Export Citation:
Assignee:
Panasonic Corporation
International Classes:
G11C13/00
Domestic Patent References:
| JP2011146111A | 2011-07-28 | |||
| JP2007004935A | 2007-01-11 |
Foreign References:
| WO2010021134A1 | 2010-02-25 |
Attorney, Agent or Firm:
Hiromori Arai