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Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5187341
Kind Code:
B2
Abstract:

To efficiently form solder balls to be used for flip-chip connecting a mother chip onto a circuit board.

In a wafer state, a plurality of solder balls are formed on respective circuit surfaces of a plurality of mother chips. Then, daughter chips are flip-chip connected to respective circuit surfaces of the plurality of mother chips in the wafer state. Then, the wafer is separated into individual mother chips by dicing to form the plurality of mother chips to each of which the daughter chip and the plurality of solder balls are connected. In a solder ball forming step, resist having apertures on positions corresponding to a plurality of solder ball forming regions is formed on the circuit surface of the mother chip, the apertures are filled with solder paste, and after removing the resist, the mother chip is heated to melt solder to form a plurality of solder balls. In a flip-chip step, flip-chip connection is performed in a state that the mother chip is set on a stage at a first temperature lower than a melting point of the plurality of solder balls, and is performed in a state that the daughter chip is set to a second temperature higher than the first temperature.

COPYRIGHT: (C)2010,JPO&INPIT


Inventors:
Toshihiro Iwasaki
Kimura Michitaka
Kozo Harada
Application Number:
JP2010093034A
Publication Date:
April 24, 2013
Filing Date:
April 14, 2010
Export Citation:
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Assignee:
Renesas Electronics Corporation
International Classes:
H01L25/065; H01L21/60; H01L25/07; H01L25/18
Domestic Patent References:
JP2002141367A
JP200471648A
JP2001308258A
Attorney, Agent or Firm:
Mamoru Takada
Hideki Takahashi
Tamaki Otsuka
Yoshimi Kuno



 
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