Title:
半導体装置
Document Type and Number:
Japanese Patent JP5190555
Kind Code:
B2
Abstract:
It is an object to provide a memory device whose power consumption can be suppressed and a semiconductor device including the memory device. As a switching element for holding electric charge accumulated in a transistor which functions as a memory element, a transistor including an oxide semiconductor film as an active layer is provided for each memory cell in the memory device. The transistor which is used as a memory element has a first gate electrode, a second gate electrode, a semiconductor film located between the first gate electrode and the second gate electrode, a first insulating film located between the first gate electrode and the semiconductor film, a second insulating film located between the second gate electrode and the semiconductor film, and a source electrode and a drain electrode in contact with the semiconductor film.
Inventors:
Yutaka Shionoiri
Hiroyuki Miyake
Kiyoshi Kato
Hiroyuki Miyake
Kiyoshi Kato
Application Number:
JP2012196754A
Publication Date:
April 24, 2013
Filing Date:
September 07, 2012
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L21/8242; G11C11/405; H01L27/105; H01L27/108; H01L29/786
Domestic Patent References:
JP10084047A | ||||
JP4099060A | ||||
JP2001230329A | ||||
JP2009212443A | ||||
JP2006165532A | ||||
JP2005011492A |