Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5209196
Kind Code:
B2
Abstract:
Methods of manufacturing a semiconductor device include forming an NMOS transistor on a semiconductor substrate, forming a first interlayer dielectric layer on the NMOS transistor, and dehydrogenating the first interlayer dielectric layer. Dehydrogenating the first interlayer dielectric layer may change a stress of the first interlayer dielectric layer. In particular, the first interlayer dielectric layer may have a tensile stress of 200 MPa or more after dehydrogenization. Semiconductor devices including dehydrogenated interlayer dielectric layers are also provided.
Inventors:
Chung Yong Country
Andrew Tekim
Shinto stone
Andrew Tekim
Shinto stone
Application Number:
JP2006301719A
Publication Date:
June 12, 2013
Filing Date:
November 07, 2006
Export Citation:
Assignee:
Samsung Electronics Co.,Ltd.
International Classes:
H01L21/336; H01L21/768; H01L21/8238; H01L23/522; H01L27/092; H01L29/78; H01L29/786
Domestic Patent References:
| JP4345069A | ||||
| JP3248569A | ||||
| JP8213383A | ||||
| JP57030337A | ||||
| JP2000164716A | ||||
| JP2001250956A | ||||
| JP2000188290A |
Foreign References:
| WO2002043151A1 |
Attorney, Agent or Firm:
Makoto Hagiwara