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Title:
マスク検証方法、半導体装置の製造方法およびマスク検証プログラム
Document Type and Number:
Japanese Patent JP5248540
Kind Code:
B2
Abstract:
According to a mask verifying method of the embodiment, a difference between an actual dimension of a mask pattern and a simulation dimension is calculated as a computational estimated value. Moreover, a difference between an actual dimension of the mask pattern that is actually measured and a dimension on pattern data is calculated as an actually-measured difference. Then, it is verified whether a mask pattern dimension passes or fails based on the calculated value. When calculating the computational estimated value, a model function, which is set based on each correspondence relationship between an actual dimension and a mask simulation dimension of a test pattern, which includes a plurality of types of pattern ambient environments, to the mask pattern.

Inventors:
Shigeki Nojima
Matsunawa Tetsuaki
Shigeru Hasebe
Miyahiro Masahiro
Application Number:
JP2010029316A
Publication Date:
July 31, 2013
Filing Date:
February 12, 2010
Export Citation:
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Assignee:
Toshiba Corporation
International Classes:
G03F1/84; G03F1/36; G03F1/68; G03F1/70; H01L21/027
Domestic Patent References:
JP200883652A
JP200357801A
JP200461720A
Attorney, Agent or Firm:
Hiroaki Sakai



 
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