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Title:
回路基板及びその接続方法
Document Type and Number:
Japanese Patent JP5257828
Kind Code:
B2
Abstract:

To provide a circuit board having a terminal structure (device structure) such that a wiring layer connected to a circuit element provided on the board and an external wiring terminal can be excellently connected, and to provide a connecting method for the circuit board.

The wiring layer 3 is formed on an insulating film 2 such as a gate insulating film provided on the insulating substrate 1 such as a glass substrate, a relatively thick planarizing film 4 is formed of an organic material to cover the wiring layer 3, and connected to the wiring layer 3 through a contact hole CH bored in the planarizing film 4, and a terminal electrode 5 is formed having one end extended to a terminal connection area Rtm on the planarizing film 4. An external wiring terminal portion 8 is electrically connected to the terminal electrode 5 formed extending to the terminal connection area Rtm through conductive particles 6 contained in an anisotropic conductive adhesive etc.

COPYRIGHT: (C)2009,JPO&INPIT


Inventors:
Tadahisa Toyama
Application Number:
JP2007222202A
Publication Date:
August 07, 2013
Filing Date:
August 29, 2007
Export Citation:
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Assignee:
CASIO COMPUTER CO.,LTD.
International Classes:
G09F9/30; G09F9/00; H01L51/50; H05B33/06
Domestic Patent References:
JP2002244151A
JP2001313397A
JP2006146041A
Attorney, Agent or Firm:
Hidemi Kashima



 
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