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Title:
半導体記憶装置
Document Type and Number:
Japanese Patent JP5281746
Kind Code:
B2
Abstract:
Manufacturing processes for phase change memory have suffered from the problem of chalcogenide material being susceptible to delamination, since this material exhibits low adhesion to high melting point metals and silicon oxide films. Furthermore, chalcogenide material has low thermal stability and hence tends to sublime during the manufacturing process of phase change memory. According to the present invention, conductive or insulative adhesive layers are formed over and under the chalcogenide material layer to enhance its delamination strength. Further, a protective film made up of a nitride film is formed on the sidewalls of the chalcogenide material layer to prevent sublimation of the chalcogenide material layer.

Inventors:
Yuichi Matsui
Nozomi Matsuzaki
Norikatsu Takaura
Naoki Yamamoto
Hideyuki Matsuoka
Iwasaki Fusei
Application Number:
JP2006513531A
Publication Date:
September 04, 2013
Filing Date:
May 09, 2005
Export Citation:
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Assignee:
Renesas Electronics Corporation
International Classes:
H01L27/105; H01L27/10; H01L27/24; H01L45/00
Domestic Patent References:
JP2005524230A2005-08-11
JPH11505071A1999-05-11
JPH0445584A1992-02-14
JP2004006579A2004-01-08
JP2003100911A2003-04-04
JP2003174144A2003-06-20
JP2002110939A2002-04-12
JP2003174144A2003-06-20
JP2002110939A2002-04-12
JPH11505071A1999-05-11
Foreign References:
WO2003092051A22003-11-06
WO2003092051A22003-11-06
US20020080647A12002-06-27
Attorney, Agent or Firm:
Polaire Patent Business Corporation



 
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