Title:
アクセスとプリチャージが独立したメモリ
Document Type and Number:
Japanese Patent JP5563467
Kind Code:
B2
Abstract:
Digital memory devices and systems, as well as methods of operating digital memory devices, that include access circuitry to access a first subset of a plurality of memory cells associated with a current access address during a current access cycle and precharge circuitry, disposed in parallel relative to the access circuitry, to precharge in full or in part a second subset of the plurality of memory cells associated with a next precharge address during the current access cycle.
Inventors:
Mohansie Earl Lao
Application Number:
JP2010530032A
Publication Date:
July 30, 2014
Filing Date:
October 09, 2008
Export Citation:
Assignee:
S. Aqua Semiconductor, LRC
International Classes:
G06F12/02; G11C11/4094
Domestic Patent References:
| JP2002342159A | ||||
| JP6274410A | ||||
| JP2001319479A | ||||
| JP7029376A | ||||
| JP9213070A | ||||
| JP8180695A | ||||
| JP8185698A | ||||
| JP62205452A | ||||
| JP2001022638A | ||||
| JP2002222117A |
Attorney, Agent or Firm:
Kenji Sugimura
Akito Okura
Akito Okura