Title:
デルタ−シグマ・ディジタル／アナログ・コンバータ付きの効率的ハードウェアのトランシーバ
Document Type and Number:
Japanese Patent JP5602709
Kind Code:
B2
Abstract:
A hardware-efficient transceiver. The transceiver includes a digital circuit for converting baseband signals to intermediate frequency signals. A signal source provides a first periodic signal of a first frequency. A direct digital synthesizer provides a second periodic signal of a second frequency from the first periodic reference signal. An upconverter circuit digitally upconverts the baseband signals to digital intermediate frequency signals using the second periodic signal A digital-to-analog converter converts the digital intermediate frequency signals to analog intermediate frequency signals using the first periodic signal. In the transceiver implementation, the digital circuit upconverts a first transmit signal from a first frequency to a second frequency in response to the second periodic signal and provides a digital transmit signal in response thereto. A second circuit is provided for converting the digital transmit signal to an analog transmit signal. Transmit and receive circuitry are provided for transmitting the analog transmit signal and receiving an analog receive signal, respectively. In a specific embodiment, the analog receive signal is digitally downconverted to provide a digital receive signal in response to a second periodic signal. A significant feature of the invention resides in the provision of the first and second periodic signals with a single local oscillator. A direct digital synthesizer is included for generating one of the reference signals from the output of the local oscillator. The transmit circuit includes a delta-sigma digital-to-analog converter having the first periodic signal as an input The delta-sigma digital-to-analog converter has a low-bit digital-to-analog converter and a delta-sigma modulator. In the illustrative embodiment, the low-bit digital-to-analog converter is a 1-bit digital-to-analog converter and the delta-sigma modulator is a sixth order delta-sigma modulator. The delta-sigma modulator includes amplifiers with approximately the following gains: 3/2, -3/4, 1/8.
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Inventors:
Daniel KS Butterfield
Application Number:
JP2011246460A
Publication Date:
October 08, 2014
Filing Date:
November 10, 2011
Export Citation:
Assignee:
クゥアルコム, Incorporated QUALCOMM INCORPORATED
International Classes:
H03M3/02; H04B1/40; H03F3/24; H04B1/38; H04L27/00
Attorney, Agent or Firm:
Masatoshi Kurata
Toshihiro Fukuhara
Makoto Nakamura
Nobuhisa Nogawa
Toshiro Shirane
Peak Takashi
Yukinaga Yasujiro
Naoki Kono
Sunagawa 克
Iseki Mamoru 3
Takao Akaho
Tadashi Inoue
Tatsushi Sato
Okada Kishi
Mihoko Horiuchi
Masanori Takeuchi
Toshihiro Fukuhara
Makoto Nakamura
Nobuhisa Nogawa
Toshiro Shirane
Peak Takashi
Yukinaga Yasujiro
Naoki Kono
Sunagawa 克
Iseki Mamoru 3
Takao Akaho
Tadashi Inoue
Tatsushi Sato
Okada Kishi
Mihoko Horiuchi
Masanori Takeuchi
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