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Title:
半導体素子の特性測定方法および半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5618662
Kind Code:
B2
Abstract:
A measurement terminal is arranged at an edge of a semiconductor wafer to be apart from a gate electrode and a source electrode formed in a surface portion on one side in a thickness direction of a semiconductor wafer so that an electrode contact portion is in contact with a drain electrode on the other side in the thickness direction of the semiconductor wafer and that a terminal contact portion is exposed to the one side in the thickness direction of the semiconductor wafer. A probe terminal is brought into contact with the terminal contact portion of the measurement terminal and the probe terminal is brought into contact with the gate electrode and the source electrode, to thereby measure electrical characteristics of a MOSFET.

Inventors:
楢崎 敦司
Application Number:
JP2010160399A
Publication Date:
November 05, 2014
Filing Date:
July 15, 2010
Export Citation:
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Assignee:
三菱電機株式会社
International Classes:
H01L21/66
Attorney, Agent or Firm:
Hidetoshi Yoshitake
Takahiro Arita



 
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